Analisis Disain 25 Step Mosfet Multilevel Inverter Terkendali SPWM
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Abstract
This paper presents a 25 level DC to AC voltage converter technique using a MOSFET with Sinusoidal Pulse Width Modulation (SPWM) control. The goal is to make an inverter that has an output voltage close to a sinusoid with the lowest possible harmonic content. The method used is to build a single-pole ladder type cascade multilevel inverter using a MOSFET semiconductor device equipped with a snubber protector when under inductive load through modeling simulations with Matlab Simulink. The simulation results show the inverter output voltage waveform in the form of a ladder wave of 25 amplitude levels 220 V with a frequency of 50 Hz with a THD of 10.26%. This design is expected to be a reference for researchers for further research and can be implemented into an electronic circuit.
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R. Ikhsan, “Disain SPWM Multilevel Inverter Satu Fasa 15 Level Dengan menggunakan Kendali Arus PLN,” J-Innovation, vol. 9, no. 1, pp. 1–6, 2020, [Online]. Available: https://jurnal.politeknikaceh.ac.id/index.php/jinnovation/article/view/83.
E. Effendi, I. D. Sara, and R. S. Lubis, “Disain SPWM Multilevel Inverter Satu Fasa Lima Belas Level,” J. Rekayasa Elektr., vol. 12, no. 2, p. 60, 2016, doi: 10.17529/jre.v12i2.3966.
A. Y, “Design and Simulation of Single-Phase Five-Level Symmetrical Cascaded H-Bridge Multilevel Inverter with Reduces Number of Switches,” J. Electr. Electron. Syst., vol. 07, no. 04, pp. 5–9, 2018, doi: 10.4172/2332-0796.1000281.
S. Shuvo, E. Hossain, T. Islam, A. Akib, S. Padmanaban, and M. Z. R. Khan, “Design and Hardware Implementation Considerations of Modified Multilevel Cascaded H-Bridge Inverter for Photovoltaic System,” IEEE Access, vol. 7, pp. 16504–16524, 2019, doi: 10.1109/ACCESS.2019.2894757.
J. M. Kharade, V. M. Patil, O. A. Bhadule, and S. S. Patil, “Comparison of Cascaded H-bridge Multilevel Inverter Topologies with THD Analysis,” pp. 3324–3330, 2017, doi: 10.15680/IJIRSET.2017.0603029.
R. Arulmozhiyal, M. Murali, and K. R. Manjeri, “Design and Analysis of 7 Level Multilevel Inverter for Industrial Applications,” Turkish J. Comput. Math. Educ., vol. 12, no. 9, pp. 2777–2781, 2021.
M. S. Bin Arif, U. Mustafa, S. B. M. Ayob, J. Rodriguez, A. Nadeem, and M. Abdelrahem, “Asymmetrical 17-Level Inverter Topology with Reduced Total Standing Voltage and Device Count,” IEEE Access, vol. 9, pp. 69710–69723, 2021, doi: 10.1109/ACCESS.2021.3077968.
Y. Wang, G. Du, J. Liang, and M. Qin, “Flexible cascaded multilevel inverter with multiple operation modes,” J. Power Electron., vol. 20, no. 3, pp. 675–686, 2020, doi: 10.1007/s43236-020-00060-4.
B. Priyanka and N. Dr sandeep, “THD assessment of cascade H-bridge multi-level inverter,” Int. J. Adv. Res. , ideas Innov. Technol., vol. 4, no. 3, pp. 1220–1225, 2018.
L. Nagarajan, A. Anne Rosaline, R. Baladhandapani, A. Nazar Ali, and A. A. Stonier, “Analysis of Three Phase Nine Level Diode Clamped Multi Level Inverter,” IOP Conf. Ser. Mater. Sci. Eng., vol. 1055, no. 1, p. 012155, 2021, doi: 10.1088/1757-899x/1055/1/012155.
Y. S. Bais, S. B. Deshpande, and S. P. Muley, “Implementation of a new H-Bridge 7-level inverter fed induction motor with lesser harmonic values,” 2017 Int. Conf. Energy, Commun. Data Anal. Soft Comput. ICECDS 2017, vol. 12, no. 1, pp. 257–262, 2018, doi: 10.1109/ICECDS.2017.8389906.
Veena B M and Triveni M T, “Hardware Implementation of 5 Level Inverter Using Microcontroller,” Int. J. Adv. Res. Electr. Electron. Instrum. Eng., vol. 2, no. 2, pp. 175–182, 2016, doi: 10.15662/IJAREEIE.2015.0501032.
M. A. Hutabarat, S. Hasan, A. H. Rambe, and Suherman, “Design and simulation hybrid filter for 17 level multilevel inverter,” Bull. Electr. Eng. Informatics, vol. 9, no. 3, pp. 886–897, 2020, doi: 10.11591/eei.v9i3.890.
I. Husnaini, Asnil, Habibullah, and Krismadinata, “Komparasi Multilevel Inverter Satu Fasa,” J. EECCIS, vol. 13, no. 2, pp. 95–99, 2019.
P. Manoharan, S. Rameshkumar, and S. Ravichandran, “Modelling and implementation of cascaded multilevel inverter as solar PV based microinverter using FPGA,” Int. J. Intell. Eng. Syst., vol. 11, no. 2, pp. 18–27, 2018, doi: 10.22266/ijies2018.0430.03.
J. G. Shankar, J. B. Edward, J. G. Shankar, and J. B. Edward, “Implementation of 9-Level Hybrid Inverter using Multi Reference Pulse Width Modulation Technique with Flyback ... Implementation of 9-Level Hybrid Inverter using Multi Reference Pulse Width Modulation Technique with Flyback Converter for Photovoltaic Syst,” no. July, pp. 365–382, 2017.
E. H. Aboadla et al., “Suppressing voltage spikes of mosfet in h?bridge inverter circuit,” Electron., vol. 10, no. 4, pp. 1–17, 2021, doi: 10.3390/electronics10040390.
R. Sathish, D. K. Kumar, K. Asokan, M. Jagathesan, and C. Thangavel, “Evaluation of a New Nine-Level Cascaded Multi Level-Inverter with Reduced Number of Components,” no. 5, pp. 619–624, 2019.
M. D. Siddique and S. Mekhilef, “A New Configuration of Nine-Level Boost Inverter with Reduced Component Count,” e-Prime, vol. 1, no. August, p. 100010, 2021, doi: 10.1016/j.prime.2021.100010.
R. Palanisamy, A. Chacko, A. Kumar, K. Selvakumar, and K. Vijayakumar, “Implementation of seven level inverter with reduced switches based grid connected PV system,” Int. J. Electr. Eng. Technol., vol. 11, no. 3, pp. 97–104, 2020.
S. Mukherjee, S. De, S. Sanyal, S. Das, and S. Saha, “A 15-level asymmetric H-bridge multilevel inverter using d-SPACE with PDPWM technique,” Int. J. Eng. Sci. Technol., vol. 11, no. 1, pp. 22–32, 2018, doi: 10.4314/ijest.v11i1.3.
R. Palanisamy, K. Vijayakumar, V. Venkatachalam, R. M. Narayanan, D. Saravanakumar, and K. Saravanan, “Simulation of various DC-DC converters for photovoltaic system,” Int. J. Electr. Comput. Eng., vol. 9, no. 2, p. 917, 2019, doi: 10.11591/ijece.v9i2.pp917-925.
K. S. Gowthaman et al., “a Nine Level Inverter With Reduced Switch Count,” Int. Res. J. Eng. Technol., vol. 7, no. 3, pp. 4659–4665, 2020.
M. F. Rizaldy, K. Khairudin, N. Soedjarwanto, and N. Purwasih, “Analisa Dampak Penggunaan Filter L-C-L Terhadap Kinerja Pengatur Kecepatan Motor Induksi,” J. Inform. dan Tek. Elektro Terap., vol. 10, no. 1, pp. 1–7, 2022, doi: 10.23960/jitet.v10i1.2254.
B. Simha and R. Mogi, “Study and Analysis of 15 Level MLI using 12 Power Mosfet Switches,” vol. 11, no. 06, pp. 347–356, 2022.
H. Matalata and I. Hamid, “Tingkat Satu Fasa Tipe Diode Clamped Dengan Mereduksi Komponen Saklar Daya,” no. 3, 2016.